; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;
;
;  PSoCGPIOINT.inc
;
;  Data: 29 October, 2001
;  Copyright Cypress MicroSystems 2001
;
;  This file is generated by the Device Editor on Application Generation.
;  It contains equates that are useful in writing code relating to GPIO
;  related interrupts.
;  
;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
;  Edits to this file will not be preserved.
;
; QP1B address and mask equates
QP1B_Data_ADDR:	equ	8h
QP1B_DriveMode_0_ADDR:	equ	108h
QP1B_DriveMode_1_ADDR:	equ	109h
QP1B_DriveMode_2_ADDR:	equ	bh
QP1B_GlobalSelect_ADDR:	equ	ah
QP1B_IntCtrl_0_ADDR:	equ	10ah
QP1B_IntCtrl_1_ADDR:	equ	10bh
QP1B_IntEn_ADDR:	equ	9h
QP1B_MASK:	equ	8h
; QP0B address and mask equates
QP0B_Data_ADDR:	equ	8h
QP0B_DriveMode_0_ADDR:	equ	108h
QP0B_DriveMode_1_ADDR:	equ	109h
QP0B_DriveMode_2_ADDR:	equ	bh
QP0B_GlobalSelect_ADDR:	equ	ah
QP0B_IntCtrl_0_ADDR:	equ	10ah
QP0B_IntCtrl_1_ADDR:	equ	10bh
QP0B_IntEn_ADDR:	equ	9h
QP0B_MASK:	equ	2h
; QP0A address and mask equates
QP0A_Data_ADDR:	equ	8h
QP0A_DriveMode_0_ADDR:	equ	108h
QP0A_DriveMode_1_ADDR:	equ	109h
QP0A_DriveMode_2_ADDR:	equ	bh
QP0A_GlobalSelect_ADDR:	equ	ah
QP0A_IntCtrl_0_ADDR:	equ	10ah
QP0A_IntCtrl_1_ADDR:	equ	10bh
QP0A_IntEn_ADDR:	equ	9h
QP0A_MASK:	equ	1h
; QP1A address and mask equates
QP1A_Data_ADDR:	equ	8h
QP1A_DriveMode_0_ADDR:	equ	108h
QP1A_DriveMode_1_ADDR:	equ	109h
QP1A_DriveMode_2_ADDR:	equ	bh
QP1A_GlobalSelect_ADDR:	equ	ah
QP1A_IntCtrl_0_ADDR:	equ	10ah
QP1A_IntCtrl_1_ADDR:	equ	10bh
QP1A_IntEn_ADDR:	equ	9h
QP1A_MASK:	equ	4h
; A0 address and mask equates
A0_Data_ADDR:	equ	0h
A0_DriveMode_0_ADDR:	equ	100h
A0_DriveMode_1_ADDR:	equ	101h
A0_DriveMode_2_ADDR:	equ	3h
A0_GlobalSelect_ADDR:	equ	2h
A0_IntCtrl_0_ADDR:	equ	102h
A0_IntCtrl_1_ADDR:	equ	103h
A0_IntEn_ADDR:	equ	1h
A0_MASK:	equ	1h
; A1 address and mask equates
A1_Data_ADDR:	equ	0h
A1_DriveMode_0_ADDR:	equ	100h
A1_DriveMode_1_ADDR:	equ	101h
A1_DriveMode_2_ADDR:	equ	3h
A1_GlobalSelect_ADDR:	equ	2h
A1_IntCtrl_0_ADDR:	equ	102h
A1_IntCtrl_1_ADDR:	equ	103h
A1_IntEn_ADDR:	equ	1h
A1_MASK:	equ	2h
; A2 address and mask equates
A2_Data_ADDR:	equ	0h
A2_DriveMode_0_ADDR:	equ	100h
A2_DriveMode_1_ADDR:	equ	101h
A2_DriveMode_2_ADDR:	equ	3h
A2_GlobalSelect_ADDR:	equ	2h
A2_IntCtrl_0_ADDR:	equ	102h
A2_IntCtrl_1_ADDR:	equ	103h
A2_IntEn_ADDR:	equ	1h
A2_MASK:	equ	4h
; A3 address and mask equates
A3_Data_ADDR:	equ	0h
A3_DriveMode_0_ADDR:	equ	100h
A3_DriveMode_1_ADDR:	equ	101h
A3_DriveMode_2_ADDR:	equ	3h
A3_GlobalSelect_ADDR:	equ	2h
A3_IntCtrl_0_ADDR:	equ	102h
A3_IntCtrl_1_ADDR:	equ	103h
A3_IntEn_ADDR:	equ	1h
A3_MASK:	equ	8h
; A4 address and mask equates
A4_Data_ADDR:	equ	0h
A4_DriveMode_0_ADDR:	equ	100h
A4_DriveMode_1_ADDR:	equ	101h
A4_DriveMode_2_ADDR:	equ	3h
A4_GlobalSelect_ADDR:	equ	2h
A4_IntCtrl_0_ADDR:	equ	102h
A4_IntCtrl_1_ADDR:	equ	103h
A4_IntEn_ADDR:	equ	1h
A4_MASK:	equ	10h
; A5 address and mask equates
A5_Data_ADDR:	equ	0h
A5_DriveMode_0_ADDR:	equ	100h
A5_DriveMode_1_ADDR:	equ	101h
A5_DriveMode_2_ADDR:	equ	3h
A5_GlobalSelect_ADDR:	equ	2h
A5_IntCtrl_0_ADDR:	equ	102h
A5_IntCtrl_1_ADDR:	equ	103h
A5_IntEn_ADDR:	equ	1h
A5_MASK:	equ	20h
; SLAVE_RX address and mask equates
SLAVE_RX_Data_ADDR:	equ	0h
SLAVE_RX_DriveMode_0_ADDR:	equ	100h
SLAVE_RX_DriveMode_1_ADDR:	equ	101h
SLAVE_RX_DriveMode_2_ADDR:	equ	3h
SLAVE_RX_GlobalSelect_ADDR:	equ	2h
SLAVE_RX_IntCtrl_0_ADDR:	equ	102h
SLAVE_RX_IntCtrl_1_ADDR:	equ	103h
SLAVE_RX_IntEn_ADDR:	equ	1h
SLAVE_RX_MASK:	equ	40h
; SLAVE_TX address and mask equates
SLAVE_TX_Data_ADDR:	equ	0h
SLAVE_TX_DriveMode_0_ADDR:	equ	100h
SLAVE_TX_DriveMode_1_ADDR:	equ	101h
SLAVE_TX_DriveMode_2_ADDR:	equ	3h
SLAVE_TX_GlobalSelect_ADDR:	equ	2h
SLAVE_TX_IntCtrl_0_ADDR:	equ	102h
SLAVE_TX_IntCtrl_1_ADDR:	equ	103h
SLAVE_TX_IntEn_ADDR:	equ	1h
SLAVE_TX_MASK:	equ	80h
; MOT0A address and mask equates
MOT0A_Data_ADDR:	equ	4h
MOT0A_DriveMode_0_ADDR:	equ	104h
MOT0A_DriveMode_1_ADDR:	equ	105h
MOT0A_DriveMode_2_ADDR:	equ	7h
MOT0A_GlobalSelect_ADDR:	equ	6h
MOT0A_IntCtrl_0_ADDR:	equ	106h
MOT0A_IntCtrl_1_ADDR:	equ	107h
MOT0A_IntEn_ADDR:	equ	5h
MOT0A_MASK:	equ	1h
; MOT0B address and mask equates
MOT0B_Data_ADDR:	equ	4h
MOT0B_DriveMode_0_ADDR:	equ	104h
MOT0B_DriveMode_1_ADDR:	equ	105h
MOT0B_DriveMode_2_ADDR:	equ	7h
MOT0B_GlobalSelect_ADDR:	equ	6h
MOT0B_IntCtrl_0_ADDR:	equ	106h
MOT0B_IntCtrl_1_ADDR:	equ	107h
MOT0B_IntEn_ADDR:	equ	5h
MOT0B_MASK:	equ	2h
; MOT1A address and mask equates
MOT1A_Data_ADDR:	equ	4h
MOT1A_DriveMode_0_ADDR:	equ	104h
MOT1A_DriveMode_1_ADDR:	equ	105h
MOT1A_DriveMode_2_ADDR:	equ	7h
MOT1A_GlobalSelect_ADDR:	equ	6h
MOT1A_IntCtrl_0_ADDR:	equ	106h
MOT1A_IntCtrl_1_ADDR:	equ	107h
MOT1A_IntEn_ADDR:	equ	5h
MOT1A_MASK:	equ	4h
; MOT1B address and mask equates
MOT1B_Data_ADDR:	equ	4h
MOT1B_DriveMode_0_ADDR:	equ	104h
MOT1B_DriveMode_1_ADDR:	equ	105h
MOT1B_DriveMode_2_ADDR:	equ	7h
MOT1B_GlobalSelect_ADDR:	equ	6h
MOT1B_IntCtrl_0_ADDR:	equ	106h
MOT1B_IntCtrl_1_ADDR:	equ	107h
MOT1B_IntEn_ADDR:	equ	5h
MOT1B_MASK:	equ	8h
; MOT2A address and mask equates
MOT2A_Data_ADDR:	equ	4h
MOT2A_DriveMode_0_ADDR:	equ	104h
MOT2A_DriveMode_1_ADDR:	equ	105h
MOT2A_DriveMode_2_ADDR:	equ	7h
MOT2A_GlobalSelect_ADDR:	equ	6h
MOT2A_IntCtrl_0_ADDR:	equ	106h
MOT2A_IntCtrl_1_ADDR:	equ	107h
MOT2A_IntEn_ADDR:	equ	5h
MOT2A_MASK:	equ	10h
; MOT2B address and mask equates
MOT2B_Data_ADDR:	equ	4h
MOT2B_DriveMode_0_ADDR:	equ	104h
MOT2B_DriveMode_1_ADDR:	equ	105h
MOT2B_DriveMode_2_ADDR:	equ	7h
MOT2B_GlobalSelect_ADDR:	equ	6h
MOT2B_IntCtrl_0_ADDR:	equ	106h
MOT2B_IntCtrl_1_ADDR:	equ	107h
MOT2B_IntEn_ADDR:	equ	5h
MOT2B_MASK:	equ	20h
; MOT3A address and mask equates
MOT3A_Data_ADDR:	equ	4h
MOT3A_DriveMode_0_ADDR:	equ	104h
MOT3A_DriveMode_1_ADDR:	equ	105h
MOT3A_DriveMode_2_ADDR:	equ	7h
MOT3A_GlobalSelect_ADDR:	equ	6h
MOT3A_IntCtrl_0_ADDR:	equ	106h
MOT3A_IntCtrl_1_ADDR:	equ	107h
MOT3A_IntEn_ADDR:	equ	5h
MOT3A_MASK:	equ	40h
; MOT3B address and mask equates
MOT3B_Data_ADDR:	equ	4h
MOT3B_DriveMode_0_ADDR:	equ	104h
MOT3B_DriveMode_1_ADDR:	equ	105h
MOT3B_DriveMode_2_ADDR:	equ	7h
MOT3B_GlobalSelect_ADDR:	equ	6h
MOT3B_IntCtrl_0_ADDR:	equ	106h
MOT3B_IntCtrl_1_ADDR:	equ	107h
MOT3B_IntEn_ADDR:	equ	5h
MOT3B_MASK:	equ	80h
; MOT0EN address and mask equates
MOT0EN_Data_ADDR:	equ	8h
MOT0EN_DriveMode_0_ADDR:	equ	108h
MOT0EN_DriveMode_1_ADDR:	equ	109h
MOT0EN_DriveMode_2_ADDR:	equ	bh
MOT0EN_GlobalSelect_ADDR:	equ	ah
MOT0EN_IntCtrl_0_ADDR:	equ	10ah
MOT0EN_IntCtrl_1_ADDR:	equ	10bh
MOT0EN_IntEn_ADDR:	equ	9h
MOT0EN_MASK:	equ	10h
; MOT1EN address and mask equates
MOT1EN_Data_ADDR:	equ	8h
MOT1EN_DriveMode_0_ADDR:	equ	108h
MOT1EN_DriveMode_1_ADDR:	equ	109h
MOT1EN_DriveMode_2_ADDR:	equ	bh
MOT1EN_GlobalSelect_ADDR:	equ	ah
MOT1EN_IntCtrl_0_ADDR:	equ	10ah
MOT1EN_IntCtrl_1_ADDR:	equ	10bh
MOT1EN_IntEn_ADDR:	equ	9h
MOT1EN_MASK:	equ	20h
; MOT2EN address and mask equates
MOT2EN_Data_ADDR:	equ	8h
MOT2EN_DriveMode_0_ADDR:	equ	108h
MOT2EN_DriveMode_1_ADDR:	equ	109h
MOT2EN_DriveMode_2_ADDR:	equ	bh
MOT2EN_GlobalSelect_ADDR:	equ	ah
MOT2EN_IntCtrl_0_ADDR:	equ	10ah
MOT2EN_IntCtrl_1_ADDR:	equ	10bh
MOT2EN_IntEn_ADDR:	equ	9h
MOT2EN_MASK:	equ	40h
; MOT3EN address and mask equates
MOT3EN_Data_ADDR:	equ	8h
MOT3EN_DriveMode_0_ADDR:	equ	108h
MOT3EN_DriveMode_1_ADDR:	equ	109h
MOT3EN_DriveMode_2_ADDR:	equ	bh
MOT3EN_GlobalSelect_ADDR:	equ	ah
MOT3EN_IntCtrl_0_ADDR:	equ	10ah
MOT3EN_IntCtrl_1_ADDR:	equ	10bh
MOT3EN_IntEn_ADDR:	equ	9h
MOT3EN_MASK:	equ	80h
