;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME:   TRIADC8_1.inc
;;  Version: 1.0.0.13, Updated on 2004/07/07 at 17:55:40
;;  Generated by PSoC Designer ver 4.2 BETA b1005 : 09 July, 2004
;;
;;  DESCRIPTION:  Assembler declarations for the TriADC8 User Module for the
;;                27xxx PSoC family of devices.
;;
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************


;--------------------------------------------------
; Contants for TRIADC8_1 API's.
;--------------------------------------------------
; Counter1 Constants
TRIADC8_1_bfCounter1_Mask:             equ   01h
TRIADC8_1_bfCounter1_INT_REG:          equ   0e1h

; Counter2 Constants
TRIADC8_1_bfCounter2_Mask:             equ   01h
TRIADC8_1_bfCounter2_INT_REG:          equ   0dfh

; Counter3 Constants
TRIADC8_1_bfCounter3_Mask:             equ   02h
TRIADC8_1_bfCounter3_INT_REG:          equ   0dfh

; PWM Constants
TRIADC8_1_bfPWM16_Mask:                equ   20h
TRIADC8_1_bfPWM16_INT_REG:             equ   0e1h

; Power Settings
TRIADC8_1_bfPOWERMASK:                 equ   03h
TRIADC8_1_OFF:                         equ   00h
TRIADC8_1_LOWPOWER:                    equ   01h
TRIADC8_1_MEDPOWER:                    equ   02h
TRIADC8_1_HIGHPOWER:                   equ   03h

; Parameter Settings
TRIADC8_1_fCOMPARE_TRUE:               equ   08h      ; Bit to enable compare True interrupts

; Functionality constants
TRIADC8_1_fFSW0:                       equ   10h      ; Switch Cap FSW0 switch enable
TRIADC8_1_NoAZ:                        equ   01h      ; Set if AutoZero is no enabled
TRIADC8_1_fAutoZero:                   equ   20h      ; Switch Cap AutoZero switch enable
TRIADC8_1_fDBLK_ENABLE:                equ   01h      ; Digital block enable bit
TRIADC8_1_fPULSE_WIDE:                 equ   04h      ; Set to wide terminal count pulse

; fStatus definitions
TRIADC8_1_fDATA_READY:                 equ   10h      ; This bit is set when data is available
TRIADC8_1_bRES_MASK:                   equ   0Fh      ; This bit while in integrate cycle

; Data Format
TRIADC8_1_DATA_FORMAT:                 equ   0


;--------------------------------------------------
; Register Address Contstants for TRIADC8_1
;--------------------------------------------------
; Integrator1 Block Register Definitions
TRIADC8_1_bfADC1cr0:    equ 80h
TRIADC8_1_bfADC1cr1:    equ 81h
TRIADC8_1_bfADC1cr2:    equ 82h
TRIADC8_1_bfADC1cr3:    equ 83h
; Integrator2 Block Register Definitions
TRIADC8_1_bfADC2cr0:    equ 84h
TRIADC8_1_bfADC2cr1:    equ 85h
TRIADC8_1_bfADC2cr2:    equ 86h
TRIADC8_1_bfADC2cr3:    equ 87h
; Integrator3 Block Register Definitions
TRIADC8_1_bfADC3cr0:    equ 8ch
TRIADC8_1_bfADC3cr1:    equ 8dh
TRIADC8_1_bfADC3cr2:    equ 8eh
TRIADC8_1_bfADC3cr3:    equ 8fh

; Counter1 Block Register Definitions
TRIADC8_1_fCounter1FN:  equ 20h
TRIADC8_1_fCounter1SL:  equ 21h
TRIADC8_1_fCounter1OS:  equ 22h
TRIADC8_1_bCount1:  equ 20h
TRIADC8_1_bPeriod1: equ 21h
TRIADC8_1_bCompare1:    equ 22h
TRIADC8_1_bCounter1_CR0:    equ 23h

; Counter2 Block Register Definitions
TRIADC8_1_fCounter2FN:  equ 40h
TRIADC8_1_fCounter2SL:  equ 41h
TRIADC8_1_fCounter2OS:  equ 42h
TRIADC8_1_bCount2:  equ 40h
TRIADC8_1_bPeriod2: equ 41h
TRIADC8_1_bCompare2:    equ 42h
TRIADC8_1_bCounter2_CR0:    equ 43h


; Counter3 Block Register Definitions
TRIADC8_1_fCounter3FN:  equ 44h
TRIADC8_1_fCounter3SL:  equ 45h
TRIADC8_1_fCounter3OS:  equ 46h
TRIADC8_1_bCount3:  equ 44h
TRIADC8_1_bPeriod3: equ 45h
TRIADC8_1_bCompare3:    equ 46h
TRIADC8_1_bCounter3_CR0:    equ 47h

; PWM16 Block Register Definitions
TRIADC8_1_bfPWM_LSB_FN: equ 30h
TRIADC8_1_bfPWM_MSB_FN: equ 34h
TRIADC8_1_fPWM_LSB_CR0: equ 33h
TRIADC8_1_fPWM_MSB_CR0: equ 37h
TRIADC8_1_bPWM_Count_MSB:   equ 34h
TRIADC8_1_bPWM_Count_LSB:   equ 30h
TRIADC8_1_bPWM_Period_MSB:  equ 35h
TRIADC8_1_bPWM_Period_LSB:  equ 31h
TRIADC8_1_bPWM_IntTime_MSB: equ 36h
TRIADC8_1_bPWM_IntTime_LSB: equ 32h
TRIADC8_1_bfPWM_LSB_FN: equ 30h
TRIADC8_1_bfPWM_MSB_FN: equ 34h

; end of file TRIADC8_1.inc

