; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;
include "m8c.inc"
;  Personalization tables 
export LoadConfigTBL_u2
AREA psoc_config(rom, rel)
LoadConfigTBL_u2:
;  Ordered Global Register values
	M8C_SetBank1
	mov	reg[00h], 80h		; Port_0_DriveMode_0 register (PRT0DM0)
	mov	reg[01h], 7fh		; Port_0_DriveMode_1 register (PRT0DM1)
	M8C_SetBank0
	mov	reg[03h], 3fh		; Port_0_DriveMode_2 register (PRT0DM2)
	mov	reg[02h], c0h		; Port_0_GlobalSelect register (PRT0GS)
	M8C_SetBank1
	mov	reg[02h], 00h		; Port_0_IntCtrl_0 register (PRT0IC0)
	mov	reg[03h], 00h		; Port_0_IntCtrl_1 register (PRT0IC1)
	M8C_SetBank0
	mov	reg[01h], 00h		; Port_0_IntEn register (PRT0IE)
	M8C_SetBank1
	mov	reg[04h], ffh		; Port_1_DriveMode_0 register (PRT1DM0)
	mov	reg[05h], 00h		; Port_1_DriveMode_1 register (PRT1DM1)
	M8C_SetBank0
	mov	reg[07h], 00h		; Port_1_DriveMode_2 register (PRT1DM2)
	mov	reg[06h], ffh		; Port_1_GlobalSelect register (PRT1GS)
	M8C_SetBank1
	mov	reg[06h], 00h		; Port_1_IntCtrl_0 register (PRT1IC0)
	mov	reg[07h], 00h		; Port_1_IntCtrl_1 register (PRT1IC1)
	M8C_SetBank0
	mov	reg[05h], 00h		; Port_1_IntEn register (PRT1IE)
	M8C_SetBank1
	mov	reg[08h], f0h		; Port_2_DriveMode_0 register (PRT2DM0)
	mov	reg[09h], 0fh		; Port_2_DriveMode_1 register (PRT2DM1)
	M8C_SetBank0
	mov	reg[0bh], 0fh		; Port_2_DriveMode_2 register (PRT2DM2)
	mov	reg[0ah], 00h		; Port_2_GlobalSelect register (PRT2GS)
	M8C_SetBank1
	mov	reg[0ah], 0fh		; Port_2_IntCtrl_0 register (PRT2IC0)
	mov	reg[0bh], 0fh		; Port_2_IntCtrl_1 register (PRT2IC1)
	M8C_SetBank0
	mov	reg[09h], 0fh		; Port_2_IntEn register (PRT2IE)
	M8C_SetBank1
	mov	reg[0ch], 00h		; Port_3_DriveMode_0 register (PRT3DM0)
	mov	reg[0dh], 00h		; Port_3_DriveMode_1 register (PRT3DM1)
	M8C_SetBank0
	mov	reg[0fh], 00h		; Port_3_DriveMode_2 register (PRT3DM2)
	mov	reg[0eh], 00h		; Port_3_GlobalSelect register (PRT3GS)
	M8C_SetBank1
	mov	reg[0eh], 00h		; Port_3_IntCtrl_0 register (PRT3IC0)
	mov	reg[0fh], 00h		; Port_3_IntCtrl_1 register (PRT3IC1)
	M8C_SetBank0
	mov	reg[0dh], 00h		; Port_3_IntEn register (PRT3IE)
	M8C_SetBank1
	mov	reg[10h], 00h		; Port_4_DriveMode_0 register (PRT4DM0)
	mov	reg[11h], 00h		; Port_4_DriveMode_1 register (PRT4DM1)
	M8C_SetBank0
	mov	reg[13h], 00h		; Port_4_DriveMode_2 register (PRT4DM2)
	mov	reg[12h], 00h		; Port_4_GlobalSelect register (PRT4GS)
	M8C_SetBank1
	mov	reg[12h], 00h		; Port_4_IntCtrl_0 register (PRT4IC0)
	mov	reg[13h], 00h		; Port_4_IntCtrl_1 register (PRT4IC1)
	M8C_SetBank0
	mov	reg[11h], 00h		; Port_4_IntEn register (PRT4IE)
	M8C_SetBank1
	mov	reg[14h], 00h		; Port_5_DriveMode_0 register (PRT5DM0)
	mov	reg[15h], 00h		; Port_5_DriveMode_1 register (PRT5DM1)
	M8C_SetBank0
	mov	reg[17h], 00h		; Port_5_DriveMode_2 register (PRT5DM2)
	mov	reg[16h], 00h		; Port_5_GlobalSelect register (PRT5GS)
	M8C_SetBank1
	mov	reg[16h], 00h		; Port_5_IntCtrl_0 register (PRT5IC0)
	mov	reg[17h], 00h		; Port_5_IntCtrl_1 register (PRT5IC1)
	M8C_SetBank0
	mov	reg[15h], 00h		; Port_5_IntEn register (PRT5IE)
	M8C_SetBank1
	mov	reg[18h], 00h		; Port_6_DriveMode_0 register (PRT6DM0)
	mov	reg[19h], 00h		; Port_6_DriveMode_1 register (PRT6DM1)
	M8C_SetBank0
	mov	reg[1bh], 00h		; Port_6_DriveMode_2 register (PRT6DM2)
	mov	reg[1ah], 00h		; Port_6_GlobalSelect register (PRT6GS)
	M8C_SetBank1
	mov	reg[1ah], 00h		; Port_6_IntCtrl_0 register (PRT6IC0)
	mov	reg[1bh], 00h		; Port_6_IntCtrl_1 register (PRT6IC1)
	M8C_SetBank0
	mov	reg[19h], 00h		; Port_6_IntEn register (PRT6IE)
	M8C_SetBank1
	mov	reg[1ch], 00h		; Port_7_DriveMode_0 register (PRT7DM0)
	mov	reg[1dh], 00h		; Port_7_DriveMode_1 register (PRT7DM1)
	M8C_SetBank0
	mov	reg[1fh], 00h		; Port_7_DriveMode_2 register (PRT7DM2)
	mov	reg[1eh], 00h		; Port_7_GlobalSelect register (PRT7GS)
	M8C_SetBank1
	mov	reg[1eh], 00h		; Port_7_IntCtrl_0 register (PRT7IC0)
	mov	reg[1fh], 00h		; Port_7_IntCtrl_1 register (PRT7IC1)
	M8C_SetBank0
	mov	reg[1dh], 00h		; Port_7_IntEn register (PRT7IE)
	M8C_SetBank0
;  Global Register values
	mov	reg[60h], 28h		; AnalogColumnInputSelect register (AMX_IN)
	mov	reg[66h], 00h		; AnalogComparatorControl1 register (CMP_CR1)
	mov	reg[63h], 15h		; AnalogReferenceControl register (ARF_CR)
	mov	reg[65h], 00h		; AnalogSyncControl register (ASY_CR)
	mov	reg[e6h], 03h		; DecimatorControl_0 register (DEC_CR0)
	mov	reg[e7h], 43h		; DecimatorControl_1 register (DEC_CR1)
	mov	reg[d6h], 00h		; I2CConfig register (I2CCFG)
	mov	reg[b0h], 10h		; Row_0_InputMux register (RDI0RI)
	mov	reg[b1h], 00h		; Row_0_InputSync register (RDI0SYN)
	mov	reg[b2h], 00h		; Row_0_LogicInputAMux register (RDI0IS)
	mov	reg[b3h], 33h		; Row_0_LogicSelect_0 register (RDI0LT0)
	mov	reg[b4h], 33h		; Row_0_LogicSelect_1 register (RDI0LT1)
	mov	reg[b5h], 00h		; Row_0_OutputDrive_0 register (RDI0SRO0)
	mov	reg[b6h], 20h		; Row_0_OutputDrive_1 register (RDI0SRO1)
	mov	reg[b8h], 55h		; Row_1_InputMux register (RDI1RI)
	mov	reg[b9h], 00h		; Row_1_InputSync register (RDI1SYN)
	mov	reg[bah], 10h		; Row_1_LogicInputAMux register (RDI1IS)
	mov	reg[bbh], 05h		; Row_1_LogicSelect_0 register (RDI1LT0)
	mov	reg[bch], 05h		; Row_1_LogicSelect_1 register (RDI1LT1)
	mov	reg[bdh], 44h		; Row_1_OutputDrive_0 register (RDI1SRO0)
	mov	reg[beh], 44h		; Row_1_OutputDrive_1 register (RDI1SRO1)
	mov	reg[c0h], 00h		; Row_2_InputMux register (RDI2RI)
	mov	reg[c1h], 00h		; Row_2_InputSync register (RDI2SYN)
	mov	reg[c2h], 20h		; Row_2_LogicInputAMux register (RDI2IS)
	mov	reg[c3h], 05h		; Row_2_LogicSelect_0 register (RDI2LT0)
	mov	reg[c4h], 05h		; Row_2_LogicSelect_1 register (RDI3LT1)
	mov	reg[c5h], 88h		; Row_2_OutputDrive_0 register (RDI2SRO0)
	mov	reg[c6h], 88h		; Row_2_OutputDrive_1 register (RDI2SRO1)
	mov	reg[c8h], 00h		; Row_3_InputMux register (RDI3RI)
	mov	reg[c9h], 00h		; Row_3_InputSync register (RDI3SYN)
	mov	reg[cah], 30h		; Row_3_LogicInputAMux register (RDI3IS)
	mov	reg[cbh], 33h		; Row_3_LogicSelect_0 register (RDI3LT0)
	mov	reg[cch], 33h		; Row_3_LogicSelect_1 register (RDI3LT1)
	mov	reg[cdh], 00h		; Row_3_OutputDrive_0 register (RDI3SRO0)
	mov	reg[ceh], 00h		; Row_3_OutputDrive_1 register (RDI3SRO1)
	mov	reg[6ch], 00h		; TMP_DR0 register (TMP_DR0)
	mov	reg[6dh], 00h		; TMP_DR1 register (TMP_DR1)
	mov	reg[6eh], 00h		; TMP_DR2 register (TMP_DR2)
	mov	reg[6fh], 00h		; TMP_DR3 register (TMP_DR3)
;  Instance name AMUX4_1, User Module AMUX4
;  Instance name AMUX4_2, User Module AMUX4
;  Instance name DelSig_1, User Module DelSig
;       Instance name DelSig_1, Block Name ADC1(ASC21)
	mov	reg[94h], 88h		;DelSig_1_AtoD1cr0(ASC21CR0)
	mov	reg[95h], c0h		;DelSig_1_AtoD1cr1(ASC21CR1)
	mov	reg[96h], 00h		;DelSig_1_AtoD1cr2(ASC21CR2)
	mov	reg[97h], ech		;DelSig_1_AtoD1cr3(ASC21CR3)
;       Instance name DelSig_1, Block Name ADC2(ASD11)
	mov	reg[84h], 90h		;DelSig_1_AtoD2cr0(ASD11CR0)
	mov	reg[85h], 60h		;DelSig_1_AtoD2cr1(ASD11CR1)
	mov	reg[86h], 40h		;DelSig_1_AtoD2cr2(ASD11CR2)
	mov	reg[87h], e0h		;DelSig_1_AtoD2cr3(ASD11CR3)
;       Instance name DelSig_1, Block Name PWMLSB(DCB12)
	mov	reg[3bh], 00h		;DelSig_1_PWM_CR0_LSB(DCB12CR0)
	mov	reg[39h], ffh		;DelSig_1_PWM_DR1_LSB(DCB12DR1)
	mov	reg[3ah], 01h		;DelSig_1_PWM_DR2_LSB(DCB12DR2)
;       Instance name DelSig_1, Block Name PWMMSB(DCB13)
	mov	reg[3fh], 00h		;DelSig_1_PWM_CR0_MSB(DCB13CR0)
	mov	reg[3dh], 03h		;DelSig_1_PWM_DR1_MSB(DCB13DR1)
	mov	reg[3eh], 00h		;DelSig_1_PWM_DR2_MSB(DCB13DR2)
;  Instance name PWM8_1, User Module PWM8
;       Instance name PWM8_1, Block Name PWM8(DBB10)
	mov	reg[33h], 00h		;PWM8_1_CONTROL_REG(DBB10CR0)
	mov	reg[31h], feh		;PWM8_1_PERIOD_REG(DBB10DR1)
	mov	reg[32h], 00h		;PWM8_1_COMPARE_REG(DBB10DR2)
;  Instance name PWM8_2, User Module PWM8
;       Instance name PWM8_2, Block Name PWM8(DBB11)
	mov	reg[37h], 00h		;PWM8_2_CONTROL_REG(DBB11CR0)
	mov	reg[35h], feh		;PWM8_2_PERIOD_REG(DBB11DR1)
	mov	reg[36h], 00h		;PWM8_2_COMPARE_REG(DBB11DR2)
;  Instance name PWM8_3, User Module PWM8
;       Instance name PWM8_3, Block Name PWM8(DBB20)
	mov	reg[43h], 00h		;PWM8_3_CONTROL_REG(DBB20CR0)
	mov	reg[41h], feh		;PWM8_3_PERIOD_REG(DBB20DR1)
	mov	reg[42h], 00h		;PWM8_3_COMPARE_REG(DBB20DR2)
;  Instance name PWM8_4, User Module PWM8
;       Instance name PWM8_4, Block Name PWM8(DBB21)
	mov	reg[47h], 00h		;PWM8_4_CONTROL_REG(DBB21CR0)
	mov	reg[45h], feh		;PWM8_4_PERIOD_REG(DBB21DR1)
	mov	reg[46h], 00h		;PWM8_4_COMPARE_REG(DBB21DR2)
;  Instance name PWM8_SLAVECLK, User Module PWM8
;       Instance name PWM8_SLAVECLK, Block Name PWM8(DBB01)
	mov	reg[27h], 00h		;PWM8_SLAVECLK_CONTROL_REG(DBB01CR0)
	mov	reg[25h], 17h		;PWM8_SLAVECLK_PERIOD_REG(DBB01DR1)
	mov	reg[26h], 0ch		;PWM8_SLAVECLK_COMPARE_REG(DBB01DR2)
;  Instance name QP0A, User Module Counter8
;       Instance name QP0A, Block Name CNTR8(DCB22)
	mov	reg[4bh], 00h		;QP0A_CONTROL_REG(DCB22CR0)
	mov	reg[49h], ffh		;QP0A_PERIOD_REG(DCB22DR1)
	mov	reg[4ah], 00h		;QP0A_COMPARE_REG(DCB22DR2)
;  Instance name QP0B, User Module Counter8
;       Instance name QP0B, Block Name CNTR8(DBB31)
	mov	reg[57h], 00h		;QP0B_CONTROL_REG(DBB31CR0)
	mov	reg[55h], ffh		;QP0B_PERIOD_REG(DBB31DR1)
	mov	reg[56h], 00h		;QP0B_COMPARE_REG(DBB31DR2)
;  Instance name QP0INV, User Module DigInv
;       Instance name QP0INV, Block Name DigInv(DBB30)
	mov	reg[53h], 00h		;QP0INV_CONTROL_REG(DBB30CR0)
	mov	reg[51h], 00h		;QP0INV_PERIOD_REG (DBB30DR1)
	mov	reg[52h], 00h		;QP0INV_COMPARE_REG(DBB30DR2)
;  Instance name QP1A, User Module Counter8
;       Instance name QP1A, Block Name CNTR8(DCB23)
	mov	reg[4fh], 00h		;QP1A_CONTROL_REG(DCB23CR0)
	mov	reg[4dh], ffh		;QP1A_PERIOD_REG(DCB23DR1)
	mov	reg[4eh], 00h		;QP1A_COMPARE_REG(DCB23DR2)
;  Instance name QP1B, User Module Counter8
;       Instance name QP1B, Block Name CNTR8(DCB33)
	mov	reg[5fh], 00h		;QP1B_CONTROL_REG(DCB33CR0)
	mov	reg[5dh], ffh		;QP1B_PERIOD_REG(DCB33DR1)
	mov	reg[5eh], 00h		;QP1B_COMPARE_REG(DCB33DR2)
;  Instance name QP1INV, User Module DigInv
;       Instance name QP1INV, Block Name DigInv(DCB32)
	mov	reg[5bh], 00h		;QP1INV_CONTROL_REG(DCB32CR0)
	mov	reg[59h], 00h		;QP1INV_PERIOD_REG (DCB32DR1)
	mov	reg[5ah], 00h		;QP1INV_COMPARE_REG(DCB32DR2)
;  Instance name RefMux_1, User Module RefMux
;       Instance name RefMux_1, Block Name REFMUX(ACB01)
	mov	reg[75h], 01h		;RefMux_1_REFMUX_CR0(ACB01CR0)
	mov	reg[76h], 09h		;RefMux_1_REFMUX_CR1(ACB01CR1)
	mov	reg[77h], 10h		;RefMux_1_REFMUX_CR2(ACB01CR2)
	mov	reg[74h], 00h		;RefMux_1_REFMUX_CR3(ACB01CR3)
;  Instance name SAR6_1, User Module SAR6
;       Instance name SAR6_1, Block Name SA(ASC10)
	mov	reg[80h], 00h		;SAR6_1_CR0(ASC10CR0)
	mov	reg[81h], 5fh		;SAR6_1_CR1(ASC10CR1)
	mov	reg[82h], 60h		;SAR6_1_CR2(ASC10CR2)
	mov	reg[83h], 08h		;SAR6_1_CR3(ASC10CR3)
;  Instance name SAR6_2, User Module SAR6
;       Instance name SAR6_2, Block Name SA(ASC23)
	mov	reg[9ch], 00h		;SAR6_2_CR0(ASC23CR0)
	mov	reg[9dh], 5fh		;SAR6_2_CR1(ASC23CR1)
	mov	reg[9eh], 60h		;SAR6_2_CR2(ASC23CR2)
	mov	reg[9fh], 08h		;SAR6_2_CR3(ASC23CR3)
;  Instance name UART_SLAVE, User Module UART
;       Instance name UART_SLAVE, Block Name RX(DCB03)
	mov	reg[2fh], 00h		;UART_SLAVE_RX_CONTROL_REG(DCB03CR0)
	mov	reg[2dh], 00h		;UART_SLAVE_(DCB03DR1)
	mov	reg[2eh], 00h		;UART_SLAVE_RX_BUFFER_REG (DCB03DR2)
;       Instance name UART_SLAVE, Block Name TX(DCB02)
	mov	reg[2bh], 00h		;UART_SLAVE_TX_CONTROL_REG(DCB02CR0)
	mov	reg[29h], 00h		;UART_SLAVE_TX_BUFFER_REG (DCB02DR1)
	mov	reg[2ah], 00h		;UART_SLAVE_(DCB02DR2)
	M8C_SetBank1
;  Global Register values
	mov	reg[61h], 00h		; AnalogClockSelect1 register (CLK_CR1)
	mov	reg[69h], 00h		; AnalogClockSelect2 register (CLK_CR2)
	mov	reg[60h], 45h		; AnalogColumnClockSelect register (CLK_CR0)
	mov	reg[62h], 00h		; AnalogIOControl_0 register (ABF_CR0)
	mov	reg[67h], 33h		; AnalogLUTControl0 register (ALT_CR0)
	mov	reg[68h], 33h		; AnalogLUTControl1 register (ALT_CR1)
	mov	reg[63h], 00h		; AnalogModulatorControl_0 register (AMD_CR0)
	mov	reg[66h], 00h		; AnalogModulatorControl_1 register (AMD_CR1)
	mov	reg[d1h], 00h		; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
	mov	reg[d3h], 00h		; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
	mov	reg[d0h], 00h		; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
	mov	reg[d2h], 00h		; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
	mov	reg[e1h], 53h		; OscillatorControl_1 register (OSC_CR1)
	mov	reg[e2h], 00h		; OscillatorControl_2 register (OSC_CR2)
	mov	reg[dfh], 02h		; OscillatorControl_3 register (OSC_CR3)
	mov	reg[deh], 00h		; OscillatorControl_4 register (OSC_CR4)
	mov	reg[ddh], 00h		; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
	mov	reg[e7h], a8h		; Type2Decimator_Control register (DEC_CR2)
;  Instance name AMUX4_1, User Module AMUX4
;  Instance name AMUX4_2, User Module AMUX4
;  Instance name DelSig_1, User Module DelSig
;       Instance name DelSig_1, Block Name ADC1(ASC21)
;       Instance name DelSig_1, Block Name ADC2(ASD11)
;       Instance name DelSig_1, Block Name PWMLSB(DCB12)
	mov	reg[38h], 11h		;DelSig_1_PWM_FN_LSB(DCB12FN)
	mov	reg[39h], 16h		;DelSig_1_PWM_SL_LSB(DCB12IN)
	mov	reg[3ah], 40h		;DelSig_1_PWM_OS_LSB(DCB12OU)
;       Instance name DelSig_1, Block Name PWMMSB(DCB13)
	mov	reg[3ch], 31h		;DelSig_1_PWM_FN_MSB(DCB13FN)
	mov	reg[3dh], 36h		;DelSig_1_PWM_SL_MSB(DCB13IN)
	mov	reg[3eh], 40h		;DelSig_1_PWM_OS_MSB(DCB13OU)
;  Instance name PWM8_1, User Module PWM8
;       Instance name PWM8_1, Block Name PWM8(DBB10)
	mov	reg[30h], 31h		;PWM8_1_FUNC_REG(DBB10FN)
	mov	reg[31h], 11h		;PWM8_1_INPUT_REG(DBB10IN)
	mov	reg[32h], 45h		;PWM8_1_OUTPUT_REG(DBB10OU)
;  Instance name PWM8_2, User Module PWM8
;       Instance name PWM8_2, Block Name PWM8(DBB11)
	mov	reg[34h], 31h		;PWM8_2_FUNC_REG(DBB11FN)
	mov	reg[35h], 11h		;PWM8_2_INPUT_REG(DBB11IN)
	mov	reg[36h], 47h		;PWM8_2_OUTPUT_REG(DBB11OU)
;  Instance name PWM8_3, User Module PWM8
;       Instance name PWM8_3, Block Name PWM8(DBB20)
	mov	reg[40h], 31h		;PWM8_3_FUNC_REG(DBB20FN)
	mov	reg[41h], 11h		;PWM8_3_INPUT_REG(DBA20IN)
	mov	reg[42h], 45h		;PWM8_3_OUTPUT_REG(DBA20OU)
;  Instance name PWM8_4, User Module PWM8
;       Instance name PWM8_4, Block Name PWM8(DBB21)
	mov	reg[44h], 31h		;PWM8_4_FUNC_REG(DBB21FN)
	mov	reg[45h], 11h		;PWM8_4_INPUT_REG(DBB21IN)
	mov	reg[46h], 47h		;PWM8_4_OUTPUT_REG(DBB21OU)
;  Instance name PWM8_SLAVECLK, User Module PWM8
;       Instance name PWM8_SLAVECLK, Block Name PWM8(DBB01)
	mov	reg[24h], 61h		;PWM8_SLAVECLK_FUNC_REG(DBB01FN)
	mov	reg[25h], 14h		;PWM8_SLAVECLK_INPUT_REG(DBB01IN)
	mov	reg[26h], 00h		;PWM8_SLAVECLK_OUTPUT_REG(DBB01OU)
;  Instance name QP0A, User Module Counter8
;       Instance name QP0A, Block Name CNTR8(DCB22)
	mov	reg[48h], 21h		;QP0A_FUNC_REG(DCB22FN)
	mov	reg[49h], dch		;QP0A_INPUT_REG(DCB22IN)
	mov	reg[4ah], 40h		;QP0A_OUTPUT_REG(DCB22OU)
;  Instance name QP0B, User Module Counter8
;       Instance name QP0B, Block Name CNTR8(DBB31)
	mov	reg[54h], 21h		;QP0B_FUNC_REG(DBB31FN)
	mov	reg[55h], d8h		;QP0B_INPUT_REG(DBB31IN)
	mov	reg[56h], 40h		;QP0B_OUTPUT_REG(DBB31OU)
;  Instance name QP0INV, User Module DigInv
;       Instance name QP0INV, Block Name DigInv(DBB30)
	mov	reg[50h], 20h		;QP0INV_FUNC_REG   (DBB30FN)
	mov	reg[51h], 0ch		;QP0INV_INPUT_REG  (DBB30IN)
	mov	reg[52h], 44h		;QP0INV_OUTPUT_REG (DBB30OU)
;  Instance name QP1A, User Module Counter8
;       Instance name QP1A, Block Name CNTR8(DCB23)
	mov	reg[4ch], 21h		;QP1A_FUNC_REG(DCB23FN)
	mov	reg[4dh], feh		;QP1A_INPUT_REG(DCB23IN)
	mov	reg[4eh], 40h		;QP1A_OUTPUT_REG(DCB23OU)
;  Instance name QP1B, User Module Counter8
;       Instance name QP1B, Block Name CNTR8(DCB33)
	mov	reg[5ch], 21h		;QP1B_FUNC_REG(DCB33FN)
	mov	reg[5dh], f9h		;QP1B_INPUT_REG(DCB33IN)
	mov	reg[5eh], 40h		;QP1B_OUTPUT_REG(DCB33OU)
;  Instance name QP1INV, User Module DigInv
;       Instance name QP1INV, Block Name DigInv(DCB32)
	mov	reg[58h], 20h		;QP1INV_FUNC_REG   (DCB32FN)
	mov	reg[59h], 0eh		;QP1INV_INPUT_REG  (DCB32IN)
	mov	reg[5ah], 45h		;QP1INV_OUTPUT_REG (DCB32OU)
;  Instance name RefMux_1, User Module RefMux
;       Instance name RefMux_1, Block Name REFMUX(ACB01)
;  Instance name SAR6_1, User Module SAR6
;       Instance name SAR6_1, Block Name SA(ASC10)
;  Instance name SAR6_2, User Module SAR6
;       Instance name SAR6_2, Block Name SA(ASC23)
;  Instance name UART_SLAVE, User Module UART
;       Instance name UART_SLAVE, Block Name RX(DCB03)
	mov	reg[2ch], 05h		;UART_SLAVE_RX_FUNC_REG   (DCB03FN)
	mov	reg[2dh], e2h		;UART_SLAVE_RX_INPUT_REG  (DCB03IN)
	mov	reg[2eh], 40h		;UART_SLAVE_RX_OUTPUT_REG (DCB03OU)
;       Instance name UART_SLAVE, Block Name TX(DCB02)
	mov	reg[28h], 0dh		;UART_SLAVE_TX_FUNC_REG   (DCB02FN)
	mov	reg[29h], 02h		;UART_SLAVE_TX_INPUT_REG  (DCB02IN)
	mov	reg[2ah], 47h		;UART_SLAVE_TX_OUTPUT_REG (DCB02OU)
	M8C_SetBank0
	ret


; PSoC Configuration file trailer PsocConfig.asm
