; A0 address and mask equates
A0_Data_ADDR:	equ	0h
A0_DriveMode_0_ADDR:	equ	100h
A0_DriveMode_1_ADDR:	equ	101h
A0_DriveMode_2_ADDR:	equ	3h
A0_GlobalSelect_ADDR:	equ	2h
A0_IntCtrl_0_ADDR:	equ	102h
A0_IntCtrl_1_ADDR:	equ	103h
A0_IntEn_ADDR:	equ	1h
A0_MASK:	equ	1h
; A1 address and mask equates
A1_Data_ADDR:	equ	0h
A1_DriveMode_0_ADDR:	equ	100h
A1_DriveMode_1_ADDR:	equ	101h
A1_DriveMode_2_ADDR:	equ	3h
A1_GlobalSelect_ADDR:	equ	2h
A1_IntCtrl_0_ADDR:	equ	102h
A1_IntCtrl_1_ADDR:	equ	103h
A1_IntEn_ADDR:	equ	1h
A1_MASK:	equ	2h
; A2 address and mask equates
A2_Data_ADDR:	equ	0h
A2_DriveMode_0_ADDR:	equ	100h
A2_DriveMode_1_ADDR:	equ	101h
A2_DriveMode_2_ADDR:	equ	3h
A2_GlobalSelect_ADDR:	equ	2h
A2_IntCtrl_0_ADDR:	equ	102h
A2_IntCtrl_1_ADDR:	equ	103h
A2_IntEn_ADDR:	equ	1h
A2_MASK:	equ	4h
; A3 address and mask equates
A3_Data_ADDR:	equ	0h
A3_DriveMode_0_ADDR:	equ	100h
A3_DriveMode_1_ADDR:	equ	101h
A3_DriveMode_2_ADDR:	equ	3h
A3_GlobalSelect_ADDR:	equ	2h
A3_IntCtrl_0_ADDR:	equ	102h
A3_IntCtrl_1_ADDR:	equ	103h
A3_IntEn_ADDR:	equ	1h
A3_MASK:	equ	8h
; A4 address and mask equates
A4_Data_ADDR:	equ	0h
A4_DriveMode_0_ADDR:	equ	100h
A4_DriveMode_1_ADDR:	equ	101h
A4_DriveMode_2_ADDR:	equ	3h
A4_GlobalSelect_ADDR:	equ	2h
A4_IntCtrl_0_ADDR:	equ	102h
A4_IntCtrl_1_ADDR:	equ	103h
A4_IntEn_ADDR:	equ	1h
A4_MASK:	equ	10h
; A5 address and mask equates
A5_Data_ADDR:	equ	0h
A5_DriveMode_0_ADDR:	equ	100h
A5_DriveMode_1_ADDR:	equ	101h
A5_DriveMode_2_ADDR:	equ	3h
A5_GlobalSelect_ADDR:	equ	2h
A5_IntCtrl_0_ADDR:	equ	102h
A5_IntCtrl_1_ADDR:	equ	103h
A5_IntEn_ADDR:	equ	1h
A5_MASK:	equ	20h
; A6 address and mask equates
A6_Data_ADDR:	equ	0h
A6_DriveMode_0_ADDR:	equ	100h
A6_DriveMode_1_ADDR:	equ	101h
A6_DriveMode_2_ADDR:	equ	3h
A6_GlobalSelect_ADDR:	equ	2h
A6_IntCtrl_0_ADDR:	equ	102h
A6_IntCtrl_1_ADDR:	equ	103h
A6_IntEn_ADDR:	equ	1h
A6_MASK:	equ	40h
; A7 address and mask equates
A7_Data_ADDR:	equ	0h
A7_DriveMode_0_ADDR:	equ	100h
A7_DriveMode_1_ADDR:	equ	101h
A7_DriveMode_2_ADDR:	equ	3h
A7_GlobalSelect_ADDR:	equ	2h
A7_IntCtrl_0_ADDR:	equ	102h
A7_IntCtrl_1_ADDR:	equ	103h
A7_IntEn_ADDR:	equ	1h
A7_MASK:	equ	80h
; I2CHW_1SDA address and mask equates
I2CHW_1SDA_Data_ADDR:	equ	4h
I2CHW_1SDA_DriveMode_0_ADDR:	equ	104h
I2CHW_1SDA_DriveMode_1_ADDR:	equ	105h
I2CHW_1SDA_DriveMode_2_ADDR:	equ	7h
I2CHW_1SDA_GlobalSelect_ADDR:	equ	6h
I2CHW_1SDA_IntCtrl_0_ADDR:	equ	106h
I2CHW_1SDA_IntCtrl_1_ADDR:	equ	107h
I2CHW_1SDA_IntEn_ADDR:	equ	5h
I2CHW_1SDA_MASK:	equ	1h
; I2CHW_1SCL address and mask equates
I2CHW_1SCL_Data_ADDR:	equ	4h
I2CHW_1SCL_DriveMode_0_ADDR:	equ	104h
I2CHW_1SCL_DriveMode_1_ADDR:	equ	105h
I2CHW_1SCL_DriveMode_2_ADDR:	equ	7h
I2CHW_1SCL_GlobalSelect_ADDR:	equ	6h
I2CHW_1SCL_IntCtrl_0_ADDR:	equ	106h
I2CHW_1SCL_IntCtrl_1_ADDR:	equ	107h
I2CHW_1SCL_IntEn_ADDR:	equ	5h
I2CHW_1SCL_MASK:	equ	2h
; HOST_RX address and mask equates
HOST_RX_Data_ADDR:	equ	4h
HOST_RX_DriveMode_0_ADDR:	equ	104h
HOST_RX_DriveMode_1_ADDR:	equ	105h
HOST_RX_DriveMode_2_ADDR:	equ	7h
HOST_RX_GlobalSelect_ADDR:	equ	6h
HOST_RX_IntCtrl_0_ADDR:	equ	106h
HOST_RX_IntCtrl_1_ADDR:	equ	107h
HOST_RX_IntEn_ADDR:	equ	5h
HOST_RX_MASK:	equ	4h
; HOST_TX address and mask equates
HOST_TX_Data_ADDR:	equ	4h
HOST_TX_DriveMode_0_ADDR:	equ	104h
HOST_TX_DriveMode_1_ADDR:	equ	105h
HOST_TX_DriveMode_2_ADDR:	equ	7h
HOST_TX_GlobalSelect_ADDR:	equ	6h
HOST_TX_IntCtrl_0_ADDR:	equ	106h
HOST_TX_IntCtrl_1_ADDR:	equ	107h
HOST_TX_IntEn_ADDR:	equ	5h
HOST_TX_MASK:	equ	8h
; PAD_RX address and mask equates
PAD_RX_Data_ADDR:	equ	4h
PAD_RX_DriveMode_0_ADDR:	equ	104h
PAD_RX_DriveMode_1_ADDR:	equ	105h
PAD_RX_DriveMode_2_ADDR:	equ	7h
PAD_RX_GlobalSelect_ADDR:	equ	6h
PAD_RX_IntCtrl_0_ADDR:	equ	106h
PAD_RX_IntCtrl_1_ADDR:	equ	107h
PAD_RX_IntEn_ADDR:	equ	5h
PAD_RX_MASK:	equ	10h
; PAD_TX address and mask equates
PAD_TX_Data_ADDR:	equ	4h
PAD_TX_DriveMode_0_ADDR:	equ	104h
PAD_TX_DriveMode_1_ADDR:	equ	105h
PAD_TX_DriveMode_2_ADDR:	equ	7h
PAD_TX_GlobalSelect_ADDR:	equ	6h
PAD_TX_IntCtrl_0_ADDR:	equ	106h
PAD_TX_IntCtrl_1_ADDR:	equ	107h
PAD_TX_IntEn_ADDR:	equ	5h
PAD_TX_MASK:	equ	20h
; SLAVE_RX address and mask equates
SLAVE_RX_Data_ADDR:	equ	4h
SLAVE_RX_DriveMode_0_ADDR:	equ	104h
SLAVE_RX_DriveMode_1_ADDR:	equ	105h
SLAVE_RX_DriveMode_2_ADDR:	equ	7h
SLAVE_RX_GlobalSelect_ADDR:	equ	6h
SLAVE_RX_IntCtrl_0_ADDR:	equ	106h
SLAVE_RX_IntCtrl_1_ADDR:	equ	107h
SLAVE_RX_IntEn_ADDR:	equ	5h
SLAVE_RX_MASK:	equ	40h
; SLAVE_TX address and mask equates
SLAVE_TX_Data_ADDR:	equ	4h
SLAVE_TX_DriveMode_0_ADDR:	equ	104h
SLAVE_TX_DriveMode_1_ADDR:	equ	105h
SLAVE_TX_DriveMode_2_ADDR:	equ	7h
SLAVE_TX_GlobalSelect_ADDR:	equ	6h
SLAVE_TX_IntCtrl_0_ADDR:	equ	106h
SLAVE_TX_IntCtrl_1_ADDR:	equ	107h
SLAVE_TX_IntEn_ADDR:	equ	5h
SLAVE_TX_MASK:	equ	80h
; D0 address and mask equates
D0_Data_ADDR:	equ	8h
D0_DriveMode_0_ADDR:	equ	108h
D0_DriveMode_1_ADDR:	equ	109h
D0_DriveMode_2_ADDR:	equ	bh
D0_GlobalSelect_ADDR:	equ	ah
D0_IntCtrl_0_ADDR:	equ	10ah
D0_IntCtrl_1_ADDR:	equ	10bh
D0_IntEn_ADDR:	equ	9h
D0_MASK:	equ	1h
; D1 address and mask equates
D1_Data_ADDR:	equ	8h
D1_DriveMode_0_ADDR:	equ	108h
D1_DriveMode_1_ADDR:	equ	109h
D1_DriveMode_2_ADDR:	equ	bh
D1_GlobalSelect_ADDR:	equ	ah
D1_IntCtrl_0_ADDR:	equ	10ah
D1_IntCtrl_1_ADDR:	equ	10bh
D1_IntEn_ADDR:	equ	9h
D1_MASK:	equ	2h
; D2 address and mask equates
D2_Data_ADDR:	equ	8h
D2_DriveMode_0_ADDR:	equ	108h
D2_DriveMode_1_ADDR:	equ	109h
D2_DriveMode_2_ADDR:	equ	bh
D2_GlobalSelect_ADDR:	equ	ah
D2_IntCtrl_0_ADDR:	equ	10ah
D2_IntCtrl_1_ADDR:	equ	10bh
D2_IntEn_ADDR:	equ	9h
D2_MASK:	equ	4h
; D3 address and mask equates
D3_Data_ADDR:	equ	8h
D3_DriveMode_0_ADDR:	equ	108h
D3_DriveMode_1_ADDR:	equ	109h
D3_DriveMode_2_ADDR:	equ	bh
D3_GlobalSelect_ADDR:	equ	ah
D3_IntCtrl_0_ADDR:	equ	10ah
D3_IntCtrl_1_ADDR:	equ	10bh
D3_IntEn_ADDR:	equ	9h
D3_MASK:	equ	8h
; D4 address and mask equates
D4_Data_ADDR:	equ	8h
D4_DriveMode_0_ADDR:	equ	108h
D4_DriveMode_1_ADDR:	equ	109h
D4_DriveMode_2_ADDR:	equ	bh
D4_GlobalSelect_ADDR:	equ	ah
D4_IntCtrl_0_ADDR:	equ	10ah
D4_IntCtrl_1_ADDR:	equ	10bh
D4_IntEn_ADDR:	equ	9h
D4_MASK:	equ	10h
; D5 address and mask equates
D5_Data_ADDR:	equ	8h
D5_DriveMode_0_ADDR:	equ	108h
D5_DriveMode_1_ADDR:	equ	109h
D5_DriveMode_2_ADDR:	equ	bh
D5_GlobalSelect_ADDR:	equ	ah
D5_IntCtrl_0_ADDR:	equ	10ah
D5_IntCtrl_1_ADDR:	equ	10bh
D5_IntEn_ADDR:	equ	9h
D5_MASK:	equ	20h
; D6 address and mask equates
D6_Data_ADDR:	equ	8h
D6_DriveMode_0_ADDR:	equ	108h
D6_DriveMode_1_ADDR:	equ	109h
D6_DriveMode_2_ADDR:	equ	bh
D6_GlobalSelect_ADDR:	equ	ah
D6_IntCtrl_0_ADDR:	equ	10ah
D6_IntCtrl_1_ADDR:	equ	10bh
D6_IntEn_ADDR:	equ	9h
D6_MASK:	equ	40h
; D7 address and mask equates
D7_Data_ADDR:	equ	8h
D7_DriveMode_0_ADDR:	equ	108h
D7_DriveMode_1_ADDR:	equ	109h
D7_DriveMode_2_ADDR:	equ	bh
D7_GlobalSelect_ADDR:	equ	ah
D7_IntCtrl_0_ADDR:	equ	10ah
D7_IntCtrl_1_ADDR:	equ	10bh
D7_IntEn_ADDR:	equ	9h
D7_MASK:	equ	80h
